CPS310 - Computer Organization II Winter 2009

There will be no questions about the x86, 6809, or Atmel 168 on the final exam. There will be questions using the Atmel 8535 and others (lab1 computer, PIC16C5X, 6502, ARC).
Below are questions people ask, please check these before emailing or phoning:

Q.Is ARC Von Neumann or Harvard?
A: Hello, Von Neumann is combined data and program memory (both stored in same RAM), Harvard has separate. Only the 6502 is Von Neumann of the ones we focused on in CPS310, the lab1 computer, PIC16C5X, ARC, and Atmel AVR 8535 are all Harvard architecture.

Q.How many status flags are there for AVR? Are they Z,N,V,C,H,S,I,T?
A. The only ones we covered in class are the basic ZNVC status bits. Most processors, including the 6502, have extra bits for things like interrupts, etc. These are not on the test.
Q. Also, will the data sheet for AVR given on the exam?
A. Yes, everything you got on the labs relevant to the different processors will be on it.

Q. How do u do comparison in PIC16C5X, b/c there is no command for that? A. As with any processor we covered you can perform subtractions and test the Z flag, or to test individual bits you can use logical operations like AND. With the PIC16C5X there are instructions to test individual bits for branches.

Q. on lec slides 20_21 slide #11 we have Size of data: 8, 16, 32 bits. Eg. C: OCR1A = 0x4D7E; Assembly (AVR) ldi r18, 0x4D sts OCR1AH, r18 ldi r18, 0x4D sts OCR1AH, r18 just confused what is "OCR1AH" in this case and why do we use r18 twice ?
A. OCR1A is a 16-bit register. The Atmel 8535 only has an 8-bit wide data bus and so we need to perform two writes to move the desired 16 bit value into the register. OCR1A has two registers appearing in the I/O space for IN/OUT instructions: OCR1AL and OCR1AH. This was a major part of lab 9 dealt with setting 16-bit registers with two 8-bit accesses. For each we must load some register, any register, with the high and low bytes (with immediate mode LDI instructions) and write the value with STS or OUT instructions. We need to load each byte in two instructions, LDI and STS (or OUT) since we don't have a "write immediate value to memory" directly in one instruction.

Q. i understand that for loading a 16 bit in AVR u need to load each 8 bits twice, but how come for that one where OCR1A=0x4D7E, you never bothered about the 7E part? it was never loaded. A. I believe there might be a mistake in that sample code. As with all the 16-bit register writes in Lab 9 the upper byte 0x4d should go to OCR1AH, the lower 0x7e should be written to OCR1AL.

Q. On lec slides 20_21 slide #15 there is RJUMP used for AVR when we do jump second time and i was jus wondering does it make a bit difference with JUMP or doesn't really matter? 3. on lec slides 16_17 slide #6 the X in the last line for AVR... i'm confused where is it coming from...
A. My mistake, there is only RJUMP for the AVR, there is a JUMP for the Atmega168 but not the Atmega8535.

Q. for RJUMP in AVR: in the instruction set there is a JMP instruction on page 347, so do we use it?
A.I only see 321 pages for the 8535 datasheet. Oh, you are looking at the Atmega168? Yes, you are, there is a JUMP instruction as well in the Atmega168. The 168 is almost the same as the 8535 but has minor differences, you found one of them. The test is on the Atmega8535.

Q. On lec slides 16_17 slide #6 the X in the last line for AVR... i'm confused where is it coming from...
A. The LDS r1,X instruction uses the X register for an indirect memory read (the contents of the 16-bit X register form the address, the contents of this address are loaded into register r1). Your question is where does C come from. As per page 11 of the data sheet, the 16-bit X register is accessed bytewise as registers r26,r27. So when using the X, Y, or Z index registers, such as for loops, you first two 8-bit registers for each.

Q. if we have to convert ARC instructions to binary on exam, will we be given the opcode for ADD and OR instructions or we have to memorise it?
A. I won't ask anything not on the data sheets (such as in the lab). No memorization required of ARC binary patterns.

Q. lec 20_21 slide #10 question 18 18. Once the head is positioned over the sector to be read, what is the data transfer rate in bytes per second for this drive? Will we calculate the answer like that: Transfer rate = 7200 rpm / 60 seconds * 512 sectors * 1024 bytes per sector = 60 MB/s
A. Yes..

Q. what will be the maximum length of the program for all processors ?
A. Equals 2^N where N = # of bits in address bus, this tells you the full addressing space of a bus. With a Harvard architecture with separate memory and data there would be a separate memory bus, the number of bits in this address bus would define the largest possible program. But most processors don't fill their entire space with program, so it depends on the device. I won't ask this question.

Q. the address space for 6502 - 2^24? (from the max length of the instruction) ?
A. No, There are 16 address lines in the 6502 so the addressing space is 2^16=65536=0x10000. The 6502 has a shared bus (Von Neumann architecture) so the program has to be smaller than that to leave room for RAM, peripherals, etc.

Q. And also, for AVR, when u add 0x19 with 0x92, the result is 0xAB, where the 7th bit is on. So I was just wondering will the N flag be on in this case? but then u are only adding two positive numbers, so why would the N bit be on?
A. The processor does not know if you're using 2's complement signed or unsigned numbers, as with the 6502, it sets the N-flag if the MSB (D7) is set to a 1 after the last ALU operation. So when programming you ignore the N flag, i.e. don't use branch instructions that use it, when you aren't doing 2's complement math and want to check for negative numbers.

Instructor: Mark Fiala

Course Management Form

  • CPS310 Winter 2009 CFM

    • Lectures

  • Lectures 0,1 Associated simulator files. Brief history of computer slides (Murdocca).
  • Lectures 2,3 (Updated errors with mux1 in tables). Associated simulator files.
  • Lectures 4,5
  • Lectures 6,7,8,9 (revised Feb 10).
    Associated PIC and 6052 examples from class (revised Feb 10).
  • Lec 11 ARC processor slides from Chapter 4 of the text (slides courtesy of the textbook author).
    Lecture 10,11 6052 code examples from class.
  • Lectures 12,13: Going over midterm and reading ARC processor Chapter 4 (up to slide 19) and Chapter 6 (up to slide 11) of the text. We did not look at Appendix B in class yet but this is a good reference also (slides courtesy of the textbook author).
  • Lectures 14,15: ARC simulator: revisiting chapter 4,6 and appendix B slides from Lectures 12,13 as well as notes in Lab 6.
    Signed and unsigned numbers: addition, subtraction, and multiplication. Chapter 3 (slides 1-13, slides 17, 23) (slides courtesy of the textbook author).
  • Lectures 16,17
  • Lecture 18,19
    Incomplete sentence on slide 3 fixed Sunday Apr 5.
  • Lectures 20,21
    C/assembly AVR examples .
  • Lectures 22, Review

    • Several lectures refer to slides by the textbook author Miles Murdocca. Here are the original slides . It appears some page numbers may have changed in the online slides (i.e. use the original slides).

    Exam Preparation

  • Here is a document providing what to study for the midterm (this will be useful for the final as well).
  • Here are the reference sheets that you will have at the back of the both the midterm and final exams: part A , part B and part C .

    • CPS 310 Microprocessors

    In this course we will use a variety of simulated and real processors.

  • Microcoding state machines - logic built in Multimedia Logic logic simulator, used for the first lectures and first two labs (same simulator we used in CPS213).
  • PIC16C5X datasheet .
  • 6502 - two simulators: 6502.exe and java emulator .
  • ARC (subset of SPARC RISC processor)- simulator . Sheet of ARC instructions .
  • 6809 wikipedia page , more information under 'information section' at this link .
  • Atmega 168 data sheet and very similar Atmega 8535 data sheet . The Atmega 8535 is on the lab board , here is the board's datasheet . Download AVR Studio for Windows for Lab 8,9.
  • x86/IA32: Links to Wikipedia introduction , simple x86 tutorial , a more detailed x86 tutorial , and a tutorial on assembly in Visual Studio .

    • Labs

    TA's: Lab sections Monday 8:00-10:00 and Monday 10:00-12:00 have Vahab Akbarzadeh (vahab DOT akbarzadeh AT ryerson.ca (changed from before, please use this address)). NOTE: see note above about possible change of first section's time
    TA's: Lab sections Monday 16:00-18:00 and Wednesday 9:00-11:00 have Shermineh Ghasemi (shermineh DOT ghasemi@ryerson.ca).

  • LAB #0 Multimedia Simulator: memory based state machines. (updated Jan 13 with ASCII table).

    • Here are the required base simulator files cps310_lab0.zip .
    Lab 0 may be submitted by email to the TA, however, you should attend the lab in order to ask questions.

  • LAB #1 Multimedia Simulator: memory based state machines (Updated Jan 20 errors with mux1 in part C).

    • Here are the required simulator files cps310_lab1.zip .
    Prepare in advance - you must have at least Part A and B of the paper work done in advance when you arrive, so that you can finish in time.

  • LAB #2 Multimedia Simulator: address decoding.

    • Here is the required base simulator files cps310_lab2.lgi (corrected C_CLOCK Jan 26).
    This lab must be performed in the lab section (no email).

  • LAB #3 PIC16C5X and 6502 Assembly.

    • The lab must be performed in the lab section (no email) except for the last two bonus sections, that if you wish to do, must be completed by the end of Friday Feb 13.

  • LAB #4 Intro to ARC processor and 6502 bonus question.

    • The lab must be performed in the lab section except for the bonus assignment. If you wish to do the bonus question, it must be completed by the start of your Lab 5 timeslot.
    Here is some C code demonstrating how to create the Mandelbrot fractal in floating point (you need to do it in fixed point in the bonus question).

  • LAB #5 Exploring some other processors - the 6809 and Atmel Atmega 168.

  • LAB #6 Programming the ARC processor.

    • The lab must be performed in the lab section except for the bonus assignment.
    Refer to Appendix B (in the new textbook only, pg 512) or refer to the slides Appendix B (slides courtesy of the textbook author) regarding the ARC 'actual' and 'synthetic' instructions and how to use the ARCTools simulator.

  • LAB #7 Multiplication and I/O, string programming for the ARC processor.

    • (REVISED version Mar 22, extra details of multiplication for negative multipliers added)
    The lab must be performed in the lab section (no emails) except for the optional bonus assignments.
    Here is the base file cps310_lab7_q9.asm for question 9.

  • LAB #8 Intro to AVR Programming.

    • Here are the lab8_assembly.asm and the lab8_c.c files required for the lab. The lab must be performed in the lab section except for the bonus assignments. If you wish to do the bonus question, it must be demonstrated at the start of your Lab 9 timeslot.
    Download the AVR software from the links under processors above.

  • LAB #9 AVR I/O and Interrupts.

    • Here are the necesssary files for Part B-E: lab9_leds.asm , lab9_led_isr.asm , lab9_piezo_button.asm , and lab9_servo.asm .
    There are six computers with AVR Studio in the lab, so you don't need to work from your laptop trasnferring the .hex files by USB key anymore. The computers are ENG211-11, ENG211-12, ENG211-05, ENG211-06, ENG211-19, ENG211-25.
    Extension of Lab 9 Bonus Questions: You now have until 4pm on Tuesday April 14 to complete and demonstrate them.
    Steve Kanellis is away Monday April 13, if you wish to return equipment please do so to Dr. Fiala.

    Recommended textbook:

    Computer Architecture and Organization: An Integrated Approach
    Miles J. Murdocca, Internet Institute, USA
    Vincent P. Heuring, University of Colorado
    ISBN: 978-0-471-73388-1
    ©2007, 544 pages

    I suggest the less expensive online version.